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;----------------------------------------
; master and slave PICs initialization
pic_init:
mov al,0x11 ; master PIC ICW1:
out 0x20,al ; bit 0: will be sending ICW4
; bit 4: always set
jmp $+2 ; wait a bit for hardware reaction
out 0xA0,al ; slave PIC ICW1
jmp $+2
mov al,0x08 ; master PIC ICW2:
out 0x21,al ; 2nd INTA pulse behavior
jmp $+2
mov al,0x70 ; slave PIC ICW2
out 0xA1,al
jmp $+2
mov al,0x04 ; master PIC ICW3:
out 0x21,al ; IR2 is connected to slave PIC
jmp $+2
mov al,0x02 ; slave PIC ICW3, ID is 2
out 0xA1,al
jmp $+2
mov al,0x01 ; master PIC ICW4:
out 0x21,al ; 8086 mode
jmp $+2
out 0xA1,al ; same for slave
jmp $+2
mov al,0xB8 ; master OCW1:
out 0x21,al ; allowed hardware IRQs are: IRQ0 (system timer), IRQ1 (keyboard)
jmp $+2 ; IRQ 6 (floppy) , IRQ 2 (slave IRQs 8-15 redirection)
mov al,0xFF ; all slave PIC IRQs masked
out 0xA1,al
ret |
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