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| If the Power6 is any guide, then the z6 mainframe processors should offer
considerably more performance than their z9 EC predecessors, but not as much as
the higher clock speed might lead you to believe. The dual-core z9 EC chip ran at 1.7
GHz and each core delivered around 580 MIPS of performance (the EC Model 701)
and an aggregate of 17,800 MIPS in a 54-processor EC Model 754 machine. The
clock speed change to 4 GHz and higher and the pipeline shift might yield somewhere
around a 50 percent raw performance increase per core, and the radically
redesigned SMP hub approach (which is not part of the Power6 machines, at least not
yet) could make the machines scale a lot more efficiently and support a lot more main
memory as well. So we might be looking at z6 cores with mainframe engines rated
around 875 MIPS to 900 MIPS, and if IBM can efficiently push up the core count and
get more work out of it, the box could deliver a lot more aggregate MIPS. The current
System z9 EC box lets around 43 percent of the aggregate MIPS go up the chimney
with its SMP implementation, and just reducing that SMP overhead to 35 percent for a
64-core z6 system would yield a mainframe with around 36,000 MIPS of
performance. |
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